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MOSFET Tutorials
   Enhancement Type MOSFET Operation, P-Channel, and CMOS
   MOSFET Circuit Symbols, iD-vDS Characteristics
   MOSFET as an Amplifier. Small-Signal Equivalent Circuit Models
   MOSFET Small-Signal Amplifier Examples
   Biasing MOSFET Amplifiers. MOSFET Current Mirrors
   Biasing MOSFET Amplifiers. MOSFET Current Mirrors
   Common Source Amplifier
   Common Source Amplifier with Source Degeneration.
   CMOS Common Source Amplifier
   MOSFET Common Gate Amplifier
   CMOS Common Gate Amplifier
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Enhancement Type MOSFETOperation P-channel and CMOS

Enhancement Type MOSFETOperation P-channel and CMOS.
We will now move on to the second major type of transistor called the field effect transistor (FET). In particular, we will examine in detail the metal oxide semiconductor FET (MOSFET). This is an extremely popular type of transistor.MOSFETs have similar uses as BJTs. They can be used as signal amplifiers and electronic switches, for example. MOSFETS can be manufactured using a relatively simple process and made very small with respect to BJTs. There are two major types of MOSFETS, called enhancement type and depletion type. Each of these types can be manufactured with a so-called n channel or p channel:

Enhancement Type, N Channel MOSFET
The enhancement type MOSFET is the most widely used FET. It finds extensive use in VLSI circuits, for example. (In general, MOSFETs are not used too often in discrete component design.) The physical structure of this type of MOSFET (enhancement type NMOS) is shown in

Typical dimensional values are L = 0.1 to 3 ìm, W = 0.2 to 100 ìm, and tox = 2 to 50 nm.The minimum L and W dimensions are dictated by the resolution of the lithography process used to create the device. Intel recently developed a 45-nm process, as described in the attached article from IEEE Spectrum. To avoid the so-called “short channel” effects, the channel length is made generally two to five times larger than the smallest possible feature sizes. Consequently, one could expect the channel length to be ~90 nm to 225 nm for the MOSFETs fabricated by this process.
Notice in the figures on the previous page that the MOSFET device has four terminals, though often the body and source terminals are connected together forming a three terminal device.
With no bias voltage applied to the gate terminal, there exists two back-to-back pn junctions between the drain and the source. No current flows from drain to source (the resistance will be on the order of 1012 Ù). In order to obtain current flow the MOSFET needs to be biased, similar to what is required for BJTs. For the MOSFET, however, we apply a voltage to the gate with respect to the source: vGS. Because of the oxide layer under the gate electrode, the gate current will be essentially zero.

In effect, the gate and the channel region form a parallel plate capacitor of sorts. Two things happen when vGS is applied:
1. Free holes in the p-type substrate are repelled from the region under the gate. This process “uncovers” bound negative charge.
2. Electrons from the heavily doped n+ regions (the drain and source) are attracted under the gate.
These effects create an n-type channel. Notice that this bias voltage vGS is required in order to create the channel: no vGS, no channel. Now, if a voltage is applied between the drain and source we will have a flow of electrons from source to drain (i.e., a current). This is the origin of the names “source” and “drain.”

The vGS required to accumulate sufficient numbers of mobile electrons in the channel is called the
threshold voltage Vt. For an n-channel MOSFET,V1»1 -3 V (note that this is a positive voltage). A family of iD-vDS characteristic curves for the MOSFET with a small vDS is shown in with vGS as the parameter:

In this mode, the transistor is behaving like a resistor between the drain and source terminals whose resistance is controlled by vGS Actually, the conductance of this channel is proportional to the so-called excess gate voltage GS t v V = - , which must be greater than zero for current to exist from drain to source.
ID-vDS for Larger vDS
The behavior of the MOSFET changes considerably when vDS increases beyond small values:

In these circumstances, an additional electric field is created from drain to source that is large enough to alter the shape of the channel. With the electric field from vDS directed as shown above, there exists more negative charges near the source end of In these circumstances, an additional electric field is created from drain to source that is large enough to alter the shape of the channel. With the electric field from vDS directed as shown above, there exists more negative charges near the source end of

Note that it is possible to increase vDS large enough to reduce the channel thickness to zero at the drain end.

This is called pinch off ( v DS £ v GS- V t ).
Does this mean that the current iD =0 ? Actually, it does not. A MOSFET that is “pinched off” at the drain end of the channel still conducts current:

The large E in the depletion region surrounding the drain will sweep electrons across the end of the pinched off channel to the drain. This is very similar to the operation of the BJT. For an npn BJT, the electric field of the reversed biased CBJ swept electrons from the base to the collector regions.
Regions of MOSFET Operation
There are three regions of operation for a MOSFET:
1. Off or cutoff region, where iD =0 .
2. “Triode” region, where VDS DS|sat=VGS-Vt
3. “Saturation” region, where
VDS > VDS| sat
The term saturation has a very different meaning for MOSFETs than for BJTs. As derived in the text on pp. 243-245, the iD-vGS relationships for MOSFETs are given mathematically as
• Triode region:

• Saturation region:

where n k ' is the process transconductance parameter [A/V2] and is equal to

Here, ìn is the mobility of electrons in the channel [cm2/(V-s)], Cox is the capacitance per unit gate area [F/m2], and åox and tox are the permittivity and thickness of the gate oxide layer, respectively.
Enhancement-Type P-Channel MOSFET
The p-channel MOSFET (PMOS) is manufactured similarly to the NMOS:

Holes are the charge carriers in the p-type channel. When operating this device: 0 GS v < , 0 DS v < , and 0 t V < . PMOS was originally the dominant MOSFET, but was replaced by NMOS. NMOS can be manufactured smaller than PMOS and operate faster.
Complementary MOS (CMOS)
CMOS are transistor circuits formed from a combination of NMOS and PMOS devices in the same circuit. Very popular.

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